A physical layer (PHY) of a network device is a lowest layer of an ISO/OSI reference model for standardizing computer-to-computer communications. A medium access controller (MAC) forms part of a data-link layer, which is the next lowest layer. The PHY establishes and maintains a physical link between communicating devices. The MAC manages access to the physical network, delimits frames, and handles error control. The PHY and MAC are described further in IEEE section 802.3, which is hereby incorporated by reference.
A standard loopback test is typically used by original equipment manufacturers (OEMs) to evaluate a connection between the MAC and the PHY. The standard loopback test also allows evaluation of digital circuits within the PHY and the MAC. Referring now to FIG. 1, a MAC 12 typically forms part of an application specific integrated circuit (ASIC) 14. The MAC 12 communicates with a PHY 16. The PHY 16 is connected by one or more transformers 18 to a medium connector 20 such as an RJ-45 connector. When an optical fiber connector is used, the transformer is not used. A medium 22 such as Category 5 (CAT 5) cable or optical fiber is connected to the medium connector 20. The PHY 16 includes a MAC-side interface 24 and a medium-side interface 26.
During the standard loopback test, a CPU 28 generates data packets that are transmitted to the MAC 12. The MAC 12 sends the data packets to the MAC-side interface 24 of the PHY 16. The PHY 16 routes the packets through one or more PHY digital circuits and sends the data packets back to the MAC 12. The MAC 12 sends the data packets back to the CPU 28. The CPU 28 compares the transmitted and received packets to evaluate the MAC 12, the PHY 16 and/or a connection 29 therebetween.
Typically the PHY 16 disables a receiver that communicates with the medium-side interface 26. Alternately, the PHY 16 transmits idles during the standard loopback test. The data packets generated by the MAC 12 usually traverse multiple digital circuits within the PHY 16 before being looped back to the MAC 12. As a result, the operation of the digital circuits can be evaluated.
Alternately, a testing device 30 is connected to the medium 22. The testing device 30 can be a PC with packet generating and comparing circuits or testing equipment such as SmartBits or IXIA. The testing device 30 sends data packets to the medium-side interface 26 of the PHY 16. The data packets travel through the PHY 16 and the MAC 12 and back to the testing device 30. The testing device 30 compares the transmitted and received data packets to evaluate the MAC 12, the PHY 16 and/or the connection.
Sometimes the PHY 16 needs to be evaluated before the ASIC 14 incorporating the MAC 12 is available. For example, OEMs may need to evaluate the PHY 16 before the ASICs 14 are available. Even if the ASIC 14 is available, the ASIC 14 may not operate properly. It is common for the ASIC 14 to be delayed due to manufacturing problems and/or bugs such as software or hardware bugs. As a result, it is also common for testing of the PHY 16 to be delayed. These ASIC-related problems cause delays in discovering problems with the PHYs 16 that may have been discovered and fixed at an earlier stage.
The PHY 16 often supports multiple interfaces. A PHY evaluation board for testing the PHY 16 must have MACs 12 that support each of the supported interfaces to test the interoperability of the PHY 16. However, it may be impractical to have all of the MACs 12 on the PHY evaluation board when the PHY 16 supports more than a few interfaces.
Another problem with the standard loopback test relates to the generation of data packets. The MACs 12 do not generate packets or include packet generating or packet comparing logic. Therefore, packet generating and packet comparing logic must also be included on the PHY evaluation board.